The present invention relates to the field of high speed digital integrated circuits. More particularly, the present invention relates to a high speed output driver for use with high speed digital integrated circuits.
Within the communications industry, there is an ever increasing need for higher data processing rates. For example, microprocessor designs are continuously increasing in operating frequency, data transmission circuit designs are transmitting data at faster and faster rates, and memory circuit designs are operating at higher and higher bandwidths. Each of the above integrated circuit types rely on output drivers to transmit data from inside the circuit to external circuits or devices. The drivers receive internal signals and drive coupled signal lines to transmit the signals to the external circuits or devices.
As operating speeds increase, and as the level of integration increases (e.g., several million transistors per die), the performance specifications for the xe2x80x9csignal driversxe2x80x9d become more demanding. Typical high performance signal driver specifications include, for example, requirements for high data transfer rates with low power consumption, high signal quality without increasing power consumption, and reduced jitter to maintain high data transfer rates. Designing and fabricating signal drivers that fulfill such high performance specifications is problematic.
One type of high performance signal driver is the Low Voltage Differential Signal Driver (e.g., LVDS driver). LVDS drivers are well known and widely used in the electronics industry. Within the digital communications field, for example, LVDS drivers are used in a variety of applications. Such applications include, for example, pulse code modulation, serial bus signal generation (e.g., serial transmission clock recovery), and the like. LVDS drivers are typically designed to function within certain performance specifications and such specifications include a given set of boundary conditions. Typical conditions include, for example, performance over operating temperature ranges, sensitivity to vibration, output sensitivity to interference, and the like. Typical performance standards include, for example, output signal phase and frequency stability, output signal programmability, and the like.
The high data rate applications in which an LVDS driver is used dictates its operating conditions and performance requirements. With most LVDS driver applications, it is usually important that the output phase and signal level of the LVDS driver is stable and is a consistent function of the control inputs (e.g., voltage, capacitance, and the like). The output phase and signal level should also be stable with respect to the different xe2x80x9cprocess cornersxe2x80x9d of the fabrication process used to manufacture the LVDS driver and should be constant over different operating temperatures and voltages.
For example in a case where a prior art LVDS driver is used in an application for clock recovery in a serial transmission system, it is important that the output phase and signal level remain stable and constant. The output phase is used to reconstruct a serial transmission clock signal, which in turn, is used to sample data on a serial transmission line. Distortion or variation in the LVDS driver output phase, and hence, the reconstructed clock signal, can lead to sampling errors, lost data, decreased throughput, or other such problems. Consequently, for these applications it is important that the LVDS driver provide a very stable, jitter free, and noise free output signal.
Additionally, high frequency operation at high data rates increases the power consumption of the LVDS driver circuits. For example, high switching speeds lead to large amounts of electric switching currents within the circuits. The high power consumption causes excessive heat generation that limits the maximum speed of the circuit. Thus, power consumption is a limiting factor in the maximum speed at which LVDS driver circuits can operate.
Another problem prior art LVDS drivers is the need to contend with power supply noise. Noise, especially low frequency noise, in the power supply can have a detrimental effect on the LVDS driver""s output stability. As a typical LVDS driver draws current from a power supply, the low frequency noise with this current (or voltage), or noise from other external devices (e.g., electromagnetic interference), can affect the output signal stability. Power supply noise typically manifests itself as jitter on the rising and falling edges of the output signal, frequency skew in the output signal, or other distortions in the fidelity of the output.
Another problem is the effect of differing manufacturing process corners. Each manufactured LVDS driver is processed in fabrication facility and is subject to the particular variables of the specific manufacturing process employed. These variables are tightly controlled in an effort to make the fabricated devices as uniform as possible. However, even the most closely monitored, tightly controlled, fabrication process has some variation, from batch to batch, of the process variables. This variation leads to slight performance variation within xe2x80x9cfamiliesxe2x80x9d of fabricated devices. The limits of this variation are referred to in the industry as process corners. Hence, each nominal device emerging from fabrication will have some statistical performance variation within the process corners. At times, this variation is large enough to limit the applications to which a particular device is suited. In more severe cases, the variation can intermittently disrupt a system which includes the particular device.
Another problem is the temperature dependent variation in the output phase stability of prior art LVDS drivers. Typical prior art LVDS drivers have difficulty maintaining a stable, constant output frequency as their operating temperatures change. When temperature increases or decreases, their output phase tends to increase or decrease correspondingly. This variation can have a detrimental effect on the application in which a particular LVDS driver is used.
Thus, what is required is an LVDS driver circuit which maintains a more constant, non-varying output frequency over differing operating temperatures. and voltages, in comparison to the prior art. What is required is a LVDS driver circuit which solves the power supply noise problems associated with the prior art. In addition, what is required is a circuit which maintains a constant jitter-free output phase across the process corners. The present invention provides a novel solution to the above requirements.
The present invention provides a driver circuit which maintains a more constant, non-varying output frequency over differing operating temperatures, in comparison to the prior art. The driver circuit of the present invention solves the power supply noise problems associated with the prior art. In addition, the driver circuit of the present invention maintains a constant jitter-free output phase across the process corners.
In one embodiment, the present invention is implemented as an LVDS driver circuit including a predriver, having an input coupled to an internal circuit, an output driver, having an output for coupling an output signal to an external circuit, a current source, and a replica bias circuit. The LVDS driver circuit is configured to have low sensitivity to fabrication process variation, power supply noise voltage variation, and operating temperature variation (PVT). The current source is coupled to provide a reference current to the predriver. The current source includes a first resistance and is configured to produce the reference current through the first resistance. The reference current is coupled to the predriver to control an output swing of the predriver, the output swing determined by a ratio of the first resistance and a second resistance located in the predriver.
The ratio of the first and second resistance and the fact that they are fabricated in exactly the same manner and the same process ensures the output swing is constant across PVT. The output driver is coupled to the predriver to receive the output swing. The output driver uses the output swing from the predriver to generate the output signal in accordance with the output swing. Since the output swing is constant across PVT, the output signal is also constant across PVT. The output swing also controls first and second current limiting transistors included in the output driver to limit current flowing through the output driver, thereby limiting power consumption of the LVDS driver circuit. Limiting power consumption limits heat generation and helps the LVDS driver circuit operate at higher switching speeds. Additionally, the predriver includes first and second levels to switch the voltage swing at high speeds with lower power consumption. The replica bias circuit provides a bias signal to both the predriver and the output driver. The replica bias circuit mimics the voltage and current characteristics of the predriver and the output driver in order to provide biasing feedback through the bias signal to keep a voltage offset of the output signal constant across PVT.